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Micro-credential Layout of Analog Chips

Opleidingsverstrekker

Katholieke Universiteit Leuven

Registratienummer

ODB-1003036

Geregistreerd

op: 8 december 2023

Deze opleiding komt in aanmerking voor

  • Opleidingscheques
  • Vlaams opleidingsverlof

Aantal uren: 52 uur

Eindbeoordeling voorzien: ja

Blended leren: nee

Mentoropleiding: nee

Extra informatie: https://www.esat.kuleuven.be/mc_chipsopent in nieuw venster

Doelgroep

This course is aimed at students with a professional bachelor's or master's degree (or with equivalent work experience) in the field of Engineering Technology. Prior knowledge on following topics is necessary: electronic systems, current, voltage, inductors, capacitors, switches, resistors, transistors and basics of electronic circuits and networks. A solid understanding of the English language is required.

Voorwaarden

  • Specifieke voorwaarden per opleidingsincentive

    Elke opleidingsincentive heeft zijn eigen specifieke voorwaarden om te bepalen of u recht heeft. Kijk na of u voldoet aan de voorwaarden van de opleidingsincentive waarvan u gebruik wil maken (Vlaams opleidingsverlof, Vlaams opleidingskrediet en opleidingscheques voor werknemers

  • Opleidingscheques: beperkende voorwaarde opleidingsniveau

    Deze opleiding kan u betalen met een opleidingscheque. Bent u hooggeschoold (u behaalde een graduaats-, bachelor- of masterdiploma)? Dan kan dat enkel als u een ‘attest loopbaanbegeleiding’ heeft van maximaal 6 jaar oud. In dit attest verklaart een loopbaanbegeleider dat de opleiding noodzakelijk is voor de uitvoering van uw persoonlijk ontwikkelplan (POP).

Inhoud van de opleiding

Electronic chips, or integrated circuits are everywhere. They are essential for a wide range of daily-use products, from your credit card to your smartphones. From your dishwasher to your car. Chips are everywhere!
The pandemic has revealed the strategic importance of chips. A shortage of chips leads to economic slow-down and chip-supply dependencies lead to geo-political tensions. However, shortage of technical skilled people that know how to design and develop a chip is a much bigger problem. A broad offer of training courses for reskilling and upskilling the workforce in this field is essential.
In this course, instructors from KU Leuven and multiple leading companies in the chip industry, will introduce students to the layout of analog chips, the software tools, reliability aspects of chips and much more. The course offers theoretical sessions but there will be a strong focus on hands-on training and real-life examples.

LEARNING OBJECTIVES
Upon completion of this course, the student:

  • can draw the floorplan and layout of an analog chip, considering the electrical and reliability aspects typical for the domain of analog electronics,
  • has insight in the fundamentals of CMOS technology and can discern the most important aspects of physical IC design,
  • can execute the IC layout flow while taking into account its different aspects, such as:
    • LVS: Layout versus Schematic checking
    • DRC: Design Rule Checking
    • PEX: Parasitic extraction
  • has insight in the influence and outcome of different analog layout styles on reliability aspects like ESD, latch-up and electromigration,
  • can discern the differences between various process options, such as SOI, BCD and FinFET,
  • has insight in layout techniques for CMOS image sensors and their influence on image quality.

PROGRAMME

  • Introduction on chips, layout & introduction to tools
  • Important elements of a layout
  • Reliability aspects for analog layout
  • Layout aspects of imagers
  • Good practices for robustness and high yield, high-speed and high-frequency
  • Analog layout hands-on workshops

The full programme can be found at https://www.esat.kuleuven.be/mc_chips/courses/layout_of_analog_chips(opent in nieuw venster)

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